Product Summary
The EP20K200RC208-3N is a Programmable Logic Device, which combines the strengths of LUT-based and productterm-based devices with an enhanced memory structure. LUT-based logic provides optimized performance and efficiency for data-path, registerintensive, mathematical, or digital signal processing (DSP) designs. Product-term-based logic is optimized for complex combinatorial paths, such as complex state machines. LUT- and product-term-based logic combined with memory functions and a wide variety of MegaCore and AMPP functions make the EP20K200RC208-3N architecture uniquely suited for system-on-a programmable-chip designs.
Parametrics
EP20K200RC208-3N absolute maximum ratings: (1)VCCINT, Supply voltage With respect to ground: -0.5 to 3.6 V; (2)VCCIO: -0.5 to 4.6 V; (3)VI, DC input voltage: -2.0 to 5.75 V; (4)IOUT, DC output current, per pin: -25 to 25 mA; (5)TSTG, Storage temperature No bias: -65 to 150℃; (6)TAMB, Ambient temperature Under bias: -65 to 135℃; (7)TJ, Junction temperature PQFP, RQFP, TQFP, and BGA packages under bias: 135℃; Ceramic PGA packages, under bias: 150℃.
Features
EP20K200RC208-3N features: (1)Industry’s first programmable logic device (PLD) incorporating; system-on-a-programmable-chip (SOPC) integration, MultiCoreTM architecture integrating look-up table (LUT) logic, product-term logic, and embedded memory; LUT logic used for register-intensive functions; Embedded system block (ESB) used to implement memory functions, including first-in first-out (FIFO) buffers, dual-port RAM, and content-addressable memory (CAM); ESB implementation of product-term logic used for combinatorial-intensive functions; (2)High density, 30,000 to 1.5 million typical gates (see Tables 1 and 2); Up to 51,840 logic elements (LEs); Up to 442,368 RAM bits that can be used without reducing available logic; Up to 3,456 product-term-based macrocells.
Diagrams
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